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LLMBoost: 1.95x LLM Inference Speedup via Compiler-Level Kernel Fusion

LLMBoost is an MLIR-based compiler optimization solution that achieves 1.67x inference speedup on NVIDIA A30 clusters by automatically detecting and fusing the RMSNorm→Linear computation pattern in Transformers, eliminating one full HBM round trip.

LLM推理优化MLIR编译器内核融合CUDATransformerRMSNormTensor CoreTVM自动调优
Published 2026-04-21 09:12Recent activity 2026-04-21 09:18Estimated read 4 min
LLMBoost: 1.95x LLM Inference Speedup via Compiler-Level Kernel Fusion
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Section 01

LLMBoost: Compiler-Level Kernel Fusion for 1.67x LLM Inference Speedup

LLMBoost is an MLIR-based compiler optimization scheme targeting Transformer inference bottlenecks. Its core innovation is auto-detecting and fusing the RMSNorm→Linear pattern, eliminating one full HBM round trip. This achieves a 1.67x speedup on NVIDIA A30 clusters without model modifications, offering transparent gains for production deployments.

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Section 02

Background: Memory Bandwidth as Inference Bottleneck

In LLM inference, memory access often limits performance more than computational power. Transformer decoding layers execute RMSNorm followed by Linear—traditional implementations write RMSNorm results to HBM then read them immediately, creating a bottleneck for 4096-dimensional hidden layers.

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Section 03

Core Implementation of LLMBoost

Key components:

  1. MLIR Op: Fused llm.fused_rmsnorm_linear with TableGen shape validation.
  2. Pattern Matching: FuseRMSNormLinear.cpp detects exact RMSNorm→Linear patterns via iterator/block checks.
  3. CUDA Kernel: Two-level warp/block reduction (using __shfl_xor_sync and shared memory) to avoid global memory, plus cuBLAS HGEMM for Tensor Core use.
  4. Safety: Skips fusion if normalized tensors have multiple consumers to prevent performance loss.
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Section 04

Performance Benchmarks & Correctness

Setup: 4×NVIDIA A30 cluster (SM80, 24GB HBM2, CUDA12.3), input shape [512,4096] × [4096,4096] (fp16). Latency: PyTorch (0.340ms,1x) vs LLMBoost (0.204ms,1.67x). Correctness: Errors vs PyTorch fp32: max abs (1.07e-02), avg abs (9.27e-04), avg relative (1.48e-02) (all within fp16 tolerance).

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Section 05

Alternatives Comparison & TVM Integration

Why MLIR?

  • vs Triton: No manual scheduling; composable passes auto-trigger for target patterns.
  • vs torch.compile: Crosses RMSNorm/GEMM boundary (torch.compile can't avoid HBM materialization). Why cuBLAS? Optimized for Tensor Core. TVM MetaSchedule: Parallel tuning on 4 GPUs, searches tile size/loop order etc., uses XGBoost cost model for optimal kernels.
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Section 06

Practical Value & Future Outlook

Practical Benefits: Higher concurrency, better real-time experience, lower cloud costs. Future: Extend pattern matching to QKV projection fusion, linear+activation fusion as MLIR matures.