Automation of Analog Circuit Design: Neural Network-Based Surrogate Modeling Approach

Analog-Design-Automation-Surrogate-Modeling is an open-source project that uses neural network surrogate models to automate the parameter design of common-source amplifiers and five-transistor operational transconductance amplifiers (OTAs). It includes automated SPICE data generation and model validation functions, providing an AI-driven optimization solution for analog circuit design, aiming to solve problems such as experience dependency and time-consuming processes in analog circuit design.

Analog circuit design is highly dependent on engineers' experience. Performance indicators (such as gain, bandwidth, power consumption) are mutually constrained, and the design space is continuous and high-dimensional. The shrinking of process nodes brings problems like short-channel effects and leakage currents, while the growth of customization demands requires shorter design cycles. Therefore, AI-accelerated analog design has become a focus area.

The project was created by mohamedkhaledezz167-creator and focuses on two types of circuits: common-source amplifiers and five-transistor OTAs. Surrogate modeling replaces high-cost simulations by training low-cost approximate models, and neural networks are ideal choices due to their function approximation capabilities. The project provides a complete automated closed-loop process from SPICE netlist generation to model validation.

1. Circuit structure: Common-source amplifier (single-stage basic) and five-transistor OTA (differential input stage + current mirror load, core module). Design parameters (transistor size, bias current) and performance indicators (gain, bandwidth, etc.) are defined. 2. Automated SPICE data generation: Parameter sampling → netlist generation → batch simulation → result parsing. It supports data updates when processes or specifications change. 3. Neural network surrogate model: Input design parameters and output performance indicators. It is necessary to balance network complexity to avoid underfitting/overfitting. For handling multiple indicators, multi-task or independent networks can be chosen. 4. Model validation: Evaluate accuracy using test sets (MSE, MAPE, etc.), and improve reliability through uncertainty quantification (ensembles, Bayesian networks, etc.).

Use surrogate models to quickly screen candidate designs, then verify with real SPICE simulations. Optimization goals can be minimizing power consumption or maximizing bandwidth under constraints, etc. The choice of optimization algorithms (grid search, genetic algorithm, Bayesian optimization, etc.) depends on the dimension of the design space. An iterative process is adopted: surrogate model screening → simulation verification → retraining the model, combining efficiency and accuracy.

• Engineers: Accelerate design iterations and evaluate candidate designs in milliseconds. - Teaching: Demonstrate the application of ML in engineering, helping to understand the combination of surrogate modeling and AI. - Research teams: Provide an extensible framework to support the exploration of advanced architectures, sampling strategies, or complex circuits.

Limitations: Model accuracy is limited by the coverage of training data; it only targets simple single-stage circuits with fixed topologies. Future directions: Introduce physical constraints to improve model generalization; use transfer learning to adapt to new processes; enable reinforcement learning to interact with simulators; establish open-source datasets and benchmark platforms.

This project is a typical case of AI empowering traditional engineering, combining ML and circuit knowledge to build automated tools. Although full automation is still far away, it has accumulated technical experience and methodologies, which are worth learning for researchers in the fields of AI for Science and engineering intelligence.