SpawnDev.ILGPU.ML: Cross-platform Hardware-agnostic .NET Machine Learning Infrastructure

SpawnDev.ILGPU.ML is a hardware-agnostic machine learning framework based on C# and ILGPU, supporting multiple backends including WebGPU, CUDA, OpenCL, WebGL, CPU, and Wasm. It allows .NET developers to run neural networks efficiently in both browser and native environments, realizing the vision of 'write once, run anywhere'.

SpawnDev.ILGPU.ML is built on top of the SpawnDev.ILGPU library, which translates C# Intermediate Language (IL) into GPU-executable code and shields the complexity of underlying CUDA/OpenCL. This project aims to fill the gap in cross-platform machine learning infrastructure within the .NET ecosystem—Python has mature frameworks like PyTorch and TensorFlow, while .NET developers often face trade-offs between performance and convenience. This framework provides a native .NET solution that balances C# type safety, development efficiency, and hardware parallel computing capabilities.

ILGPU Translation Engine Principle

ILGPU analyzes the intermediate language compiled from C#, identifies parallel computing patterns, and translates it into native code for the target platform. It automatically parallelizes the forward/backward propagation of neural networks (such as convolution and matrix multiplication), eliminating the need for developers to worry about underlying thread scheduling or memory management.

Multi-backend Implementation

Through a layered architecture: the bottom layer consists of code generators for different hardware (CUDA generates PTX, OpenCL generates kernel code, WebGPU generates compute shaders); the middle layer is a unified abstract interface (tensor operations, memory management, etc.) that decouples upper-layer code from hardware; the upper layer is optimized for Blazor Wasm, using WebGL/WebGPU to implement browser-side inference.

High-performance Computing Primitives

Implements a full set of deep learning basic operators: Convolution layers optimize memory access patterns (shared memory, texture cache); pooling, normalization, and dropout layers are designed for parallelization; activation functions (ReLU/GELU, etc.) use vectorized computing and branch prediction optimization; special functions use hardware-accelerated approximation algorithms to balance precision and speed.

Memory and Data Flow Optimization

Intelligent memory pool management reduces host/device memory transfer overhead—tensors are cached in device memory after the first transfer; supports gradient accumulation and mixed-precision training (FP16 acceleration + automatic loss scaling), allowing consumer-grade hardware to train medium-scale models.

WebGPU/WebGL Dual Track

WebGL mode: Maps computation to fragment shaders, achieving near-real-time experience for tasks like image classification through techniques such as texture packing; WebGPU mode: Uses native compute shaders to generate code with performance close to native, supporting complex NN inference.

Blazor Integration

Seamlessly integrates with the .NET component model: NNs can be injected as services into Razor components, with inference results bound to the UI; provides pre-trained model loading/caching (HTTP progressive loading + IndexedDB local caching) to ensure sensitive data never leaves the user's device.

Edge Computing and IoT

The hardware-agnostic feature adapts to diverse environments: The same code can be deployed on NVIDIA Jetson edge devices, CPU industrial controllers, or Web HMI interfaces; the Wasm backend provides a self-contained solution supporting offline operation.

Cross-platform Desktop and Mobile Applications

Cooperating with UI frameworks like .NET MAUI/Avalonia, it automatically adapts to the optimal execution path for Windows (CUDA), macOS (Metal), and mobile devices (OpenCL/OpenGLES), reducing the development and maintenance costs of multi-platform AI applications.

Current Limitations

Compared to mature frameworks like PyTorch, the pre-trained model ecosystem and advanced features (automatic differentiation, distributed training) are not yet fully developed; in complex control flow scenarios, the automatically generated GPU code may not perform as well as handwritten CUDA kernels.

Future Directions

The roadmap includes supporting more NN architectures (Transformers, diffusion models), improving ONNX interoperability, and expanding backends for emerging hardware (NPUs, TPUs); the project is active with high community participation and is expected to become an important infrastructure for .NET machine learning.